The present invention generally relates to reducing smear in charged coupled device (CCD) imaging systems, and in particular to reducing smear in Frame Transfer CCD imaging systems.
Frame Transfer CCD focal plane arrays have an image sensing portion including an array of light sensitive pixels arrayed in rows and columns for building up charge during an integrating interval. The devices also include an image storage portion into which the charge from the sensor portion is rapidly transferred during a transfer interval. The image is read out from the storage portion line by line through a horizontal transfer portion.
The image is developed by exposing the active image area to light for the integration interval. The image is then shifted from the active area to the image storage area during the transfer time interval. The image is read horizontally, one line at a time, from the image storage area to a processing circuitry during the time interval in which the next image is being integrated in the active image area.
Frame Transfer CCD focal plane arrays suffer from contamination of wanted signals by unwanted signals, or smear, during the period when the charge is transferred from the active area of the array to the storage area of the array. For large arrays, the transfer rate is limited to about one million lines per second. In the case of an HSIEVNIR FPA, transfer requires approximately 200 microseconds, and the integration time is approximately 4000 microseconds. As such, the detectors can spend about five percent of the time collecting unwanted signals. The unwanted signals are particularly undesirable for scientific instruments where only a small fraction of one percent of unwanted signals is acceptable.
To reduce smear, some existing systems utilize a shutter to prohibit the incidence of light on the active area while the integrated signals are transferred from the active area. Such systems also include a control circuit to control the operation of the shutter during the integration and the transfer time periods. The use of a shutter or similar devices is disadvantageous, however, because of the cost and complexity of the shutter and the control circuitry. Shutters are also typically slow which limits the frame rate.
Other existing systems utilize an interline transfer type system in which an opaque vertical transfer register is provided in the active area for each column of image sensitive devices. After the integration time, the collected charge is migrated to the vertical transfer registers and then transferred to the storage area for read-out. As such, the collected charge in the vertical transfer registers is unaffected by unwanted signals from incident light. However, a major disadvantage of interline systems is the cost and complexity of the vertical transfer registers required. Further, because the vertical transfer registers occupy planar space, the size of the image area is increased dramatically without a commensurate increase in the amount of information gathered by the active image area.
There is, therefore, a need for a method of processing images produced by a Frame Transfer type image array in which the unwanted signals gathered during the transfer time are substantially eliminated without the need for shutter or in-line readout systems.